Areas of expertise
Embedded Systems , Computer Architecture
- Assistant Professor
- Director of Edge Computing, Communication and Learning (ECCoLe) Lab
Phone
514 228-7013
Email
shervin.vakili@inrs.ca
Énergie Matériaux Télécommunications Research Centre
800 De La Gauchetière W
Suite 6900
Montreal, Quebec H5A 1K6
CANADA
Research interests
- Embedded system design for cognitive/intelligent radio application;
- High-efficiency computer architectures for deep learning;
- Optimization techniques for high-performance computing architecture design;
- Hardware accelerators for network security and next-generation SDN-enabled networking;
- Application-specific microprocessor architectures and ASIPs.
Shervin Vakili joined the Énergie Matériaux Télécommunications Research Centre at the Institut National de la Recherche Scientifique (INRS-EMT) as an Assistant Professor in February 2022. He received his Ph.D. in computer engineering from Polytechnique Montréal, Canada, in 2014. Following his Ph.D., he pursued research in computer architecture as a postdoctoral fellow, research associate, and professional researcher at Polytechnique Montréal and École de Technologie Supérieure in Montréal for over five years. He has extensive experience in designing ASIC- and FPGA-based computer architectures for applications in artificial intelligence, telecommunications, and computer networks. Dr. Vakili founded and currently directs the Edge Computing, Communication, and Learning (ECCoLe) lab at INRS-EMT.
His research interests include high-efficiency computer architectures, machine learning for wireless signal processing, machine learning hardware, and edge computing.
SDRobot: Software-Defined Radio-Enabled Robot Developed at the ECCoLe Lab
Founded in May 2022, Edge Computing Communication and Learning (ECCoLe) lab at INRS-EMT center is a research team dedicated to pioneering novel hardware architectures and computing techniques for high-efficiency Edge computing.
Current research at ECCoLe primarily focuses on two key areas:
1- The design of cost-effective and energy-efficient hardware accelerators for deep machine learning methods,
2- The development of hardware-aware deep learning model design and optimization techniques.
We take pride in our relatively small yet highly productive team, which has achieved significant progress and accomplishments in the short existence of ECCoLe lab. In addition to our expertise in computer architecture and advanced machine learning methods, our ECCoLe team possesses a strong foundation in wireless signal processing and maintains a robust collaboration with the telecommunication research groups at INRS-EMT. This synergy positions ECCoLe uniquely to advance research in utilizing machine learning methods within modern wireless communication systems.
TEL-302: Machine Learning for Wireless Communication
Description:
This course focuses on the expanding applications of advanced machine learning (ML) techniques in wireless communication systems. The exponential growth in the number of wirelessly connected devices has led to spectrum congestion and interference issues. Simultaneously, the increasing demand for higher communication data rates presents another critical challenge. Intelligent wireless communication techniques are gaining increasing attention as a solution to these issues.
Machine learning has demonstrated its potential to address several pivotal problems in advanced wireless communication techniques. This course provides a comprehensive review of the most recent breakthroughs and discoveries related to the use of machine learning models and techniques in tackling emerging wireless communication problems. It places particular emphasis on challenges encountered at the physical layer.
Objectives:
The primary objective is to review the latest achievements in using state-of-the-art machine learning models to address emerging wireless communication problems. It provides deep insights into the benefits and challenges associated with the utilization of different machine-learning techniques for each distinct problem. Moreover, this course outlines a roadmap that highlights the prospects and directions for machine learning-enabled wireless communications. Finally, it delves into an examination of the principal challenges encountered when deploying machine learning models for these problems, especially within edge applications, and explores the promising solutions to address them.
Contents:
- Principles of Supervised Learning, Reinforcement Learning, Unsupervised Learning
- Deep Machine Learning: Benefits and Challenges
- Transfer Learning, Adaptive Learning and Federated Learning
- Machine Learning for Wireless Signal Detection
- Machine Learning for Spectrum Sharing and Cognitive Radios
- Machine Learning for Channel Estimation and Prediction
- Machine Learning for Beamforming
- Data Augmentation and Generative AI in Machine Learning-assisted Wireless Signal Processing
- Collaborative and Adaptive Learning Solutions
- Real-Time Computing and Computational Complexity Challenge
- Hyperparameter Tuning, Quantization, Pruning
Publications
Journal papers
S. Vakili, M. Vaziri, A. Zarei, J.M.P. Langlois, “DyRecMul: Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration,” ACM Transactions on Reconfigurable Technology and Systems, 2024.
S. Vakili, A. Zarei, “DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs,” IEEE Embedded Systems Letters, 2023.
S. Vakili, M. Vaziri, A. Zarei, J.M.P. Langlois, “Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration,” arXiv, Oct. 2023.
M. Ahmadi, S. Vakili and J. M. P. Langlois, “CARLA: a convolution accelerator with a reconfigurable and low-energy architecture,” IEEE Transactions on Circuits and Systems I: Regular Papers, 2021
S. Vakili, J. M. P. Langlois, and Y. Savaria, “Enhanced Bloom filter utilisation scheme for string matching using a splitting approach,” IET Communications, vol. 12, 2018.
S. Vakili, J. M. P. Langlois, and G. Bois, “Accuracy-aware processor customization for fixed-point applications,” IET Computers & Digital Techniques, vol. 10, 2016.
S. Vakili, J. M. P. Langlois, and G. Bois, “Enhanced precision analysis for accuracy-aware bit-width optimization using affine arithmetic,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, pp. 1853-1865, 2013.
S. Vakili, J. M. P. Langlois, and G. Bois, “Customised soft processor design: a compromise between architecture description languages and parameterisable processors,” IET Computers & Digital Techniques, vol. 7, 2013.
S. Vakili, S. M. Fakhraie, and S. Mohammadi, “EvoMP: a novel MPSoC architecture with evolvable task decomposition and scheduling,” IET Computers & Digital Techniques, vol. 4, no. 2, Mar. 2010.
A. Farmahini-Farahani, S. Vakili, S. M. Fakhraie, S. Safari, and C. Lucas, “Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization,” Elsevier J. of Engineering Applications of Artificial Intelligence, vol. 23, no. 2, pp. 177-187, Mar. 2010.
Conference papers
M. Vaziri, S. Vakili, M.M. Rahimifar, J.M.P. Langlois, “HENNC: Hardware Engine for Artificial Neural Network-Based Chaotic Oscillators,” IEEE High Performance Extreme Computing Conference (HPEC), 2024.
M. Vaziri, S. Vakili, J.M.P. Langlois, “Accuracy-Aware Low-Complexity Deep Learning Models for Automatic Modulation Recognition,” IEEE International Conference on Computing, Internet of Things and Microwave Systems, 2024
S. Vakili, “A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-Based Machine Learning Computing,” IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2024), 2024.
S. Vakili, “DSCAM+: Latency-Guaranteed FPGA-Based Content Addressable Memory for SDN-Enabled Forwarding Plane,” Accepted in IEEE International Conferences on High-Performance Computing and Communications, Melbourne, Australia, Dec. 2023.
M. Ahmadi, S. Vakili, J. M. P. Langlois, “An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs,” in IEEE International NEWCAS Conference (best paper award), 2020.
M. Ahmadi, S. Vakili, J. M. P. Langlois, “Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators,” in IEEE International NEWCAS Conference, 2020.
M. Ahmadi, S. Vakili and J. M. P Langlois, “Power reduction in CNN pooling layers with a preliminary partial computation strategy,” in IEEE International NEWCAS Conference, 2018.
I. Sarbishei, S. Vakili, J. M. P. Langlois, and Y. Savaria, “Scalable memory-less architecture for string matching with FPGAs,” in Symposium on Circuits and Systems (ISCAS), May 2017.
S. Vakili, J. M. P. Langlois, B. Boughzala and Y. Savaria, “Memory-efficient string matching for intrusion detection systems using a high-precision pattern grouping algorithm,” in ACM/IEEE Symp. Architectures for Networking and Communications Systems (ANCS’2015), March 2016.
S. Vakili, J. M. P. Langlois, and G. Bois, “Finite-precision error modeling using affine arithmetic,” in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Vancouver, May. 2013, pp. 2591-2595.
S. Vakili, D. C. Gil, J. M. P. Langlois, Y. Savaria, and G. Bois, “Customized embedded processor design for global photographic tone mapping,” in 18th IEEE International Conference on Electronics, Circuits and Systems, Beirut, Lebanon, Dec. 2011, pp. 382–385.
S. Vakili, S. M. Fakhraie, and S. Mohammadi, “Designing an MPSoC architecture with run-time and evolvable task decomposition and scheduling,” in 5’th IEEE Intl. Conf. Innovations in Information Technology, Dubai, Dec. 2008.
S. Vakili, S. M. Fakhraie, S. Mohammadi, and A. Ahmadi, “Particle swarm optimization for run-time task decomposition and scheduling in evolvable MPSoC,” in IEEE. Intl. conf. Computer Engineering and Technology, Singapore, Jan. 2009